Europe leads the way to high-performance computing
The EUREKA ITEA 2 software Cluster ParMA project has developed advanced technologies to exploit multicore architectures in semiconductor chips and so deliver substantial performance improvements for high-performance computing (HPC). ParMA technology has established new goals in modelling and simulation and enabled the development of innovative computer-intensive applications to accelerate research in many domains. It offers substantial improvements in applications such as virtual prototyping to reduce costs and accelerate design of new products. The results are already being exploited in applications such as: the Bullx HPC platform, one of the world’s best supercomputer; the UNITE development tool package which includes a full set of interoperable tools for advanced debugging and analysis; and RECOM simulation software for an automatic 3D simulator.
Efficient computational power is a key differentiator for both research and industry. It is instrumental in modelling, simulation and engineering design. Until relatively recently, it had long been possible to increase the power of processors by boosting the clock frequency. However, ever smaller device sizes combined with ever greater processing needs has meant that physical constraints such as heat dissipation, power consumption and leakages required an alternative approach. Manufacturers tackled this by putting several processors working in parallel onto the same die – the basic silicon chip – and developed what is known as multicore architecture.
As a result, software developers have been forced to parallelise their code, otherwise only one core would be used to run a sequential program, and it would execute more slowly since the clock frequency has been reduced. Moreover, simply parallelising the code is not enough; it is necessary to balance the charge on each core, and to make the program scalable so that it automatically adapts to the number of cores available. Such parallel programming is key to taking full advantage of multicore architectures.